1. Field of the Invention
The present invention relates to a current transfer circuit for transferring output current corresponding to input current to a load circuit like a current mirror circuit.
2. Description of the Related Art
A bipolar monolithic IC frequently uses a current mirror circuit as a bias circuit or signal transfer circuit. Especially, a very-low-voltage operating IC with the operating supply voltage of 1 [V] or lower uses a simple current mirror circuit shown in FIG. 1.
The current mirror circuit CM10 comprises PNP transistors Q11 and Q12, both having their emitters connected to the high-potential power source V.sub.CC, and their bases connected to each other. The collector of the transistor Q11 is coupled to the base of the transistor Q11 and also to the input/output terminal A. The collector of the transistor Q12 is connected to the second input/output terminal B.
The first input/output terminal A functions as an input terminal, for example, which is connected to an input current source I10. The second input/output terminal B functions as an output terminal, for example, which is connected to a load circuit L10.
In the load circuit L10, a current mirror circuit comprising NPN-type transistors Q13 and Q14 is shown as an example.
For the circuit having the above configuration, only the transistors Q12 and Q13 are connected in series between high-potential power source V.sub.CC and low-potential power source V.sub.SS. Therefore, because there is only a small voltage drop, low-voltage operations can be executed. The operations of the above current mirror circuit CM10 are described below.
First, the base potentials of the PNP-type transistors Q11 and Q12 are decreased by the current I.sub.in obtained from the input current source I10. Thus, the transistors Q11 and Q12 are conducted respectively. In this case, if it is assumed that the characteristic of the transistor Q11 equals that of the transistor Q12, the voltage V.sub.BE between the base and emitter and the collector current Ic are theoretically the same for the both transistors.
However, a bipolar monolithic IC obtained by forming PNP-type and NPN-type transistors on the same substrate uses a P-type substrate in order to keep the substrate at the ground potential. Therefore, the NPN-type transistor is the so-called vertical type in which base-emitter junction and base-collector junction are vertically formed, while the PNP-type transistor is the so-called lateral type in which base-emitter junction and base-collector junction are horizontally formed. The lateral PNP-type transistor has smaller emitter grounded current amplification factor .beta..sub.p and smaller Early voltage V.sub.A to determine the so-called "Early effect" in which fluctuation of the voltage V.sub.CE between the collector and emitter influences the collector current Ic than the vertical NPN-type transistor.
Therefore, the error .epsilon. between the input current Iin and output current Iout or the Iout change rate .DELTA. due to the fluctuation of supply voltage which does not matter for the current mirror circuit comprising vertical-type transistors more remarkably appear and become an issue for the current mirror circuit comprising lateral-type transistors.
This point is described below.
First, the emitter grounded current amplification factor .beta..sub.p dependency of the current mirror circuit CM10 shown in FIG. 1 is considered below.
When the emitter grounded current amplification factors of the transistors Q11 and Q12 are assumed as .beta..sub.p and the input current of the current mirror circuit CM10 as I.sub.in, the output current Iout is obtained as follows: EQU Iout=Iin/{1+(2/.beta..sub.p) (1)
However, Early effect is ignored in the expression (1) in order to simplify the calculation.
When the value of .beta..sub.p is assumed as 20 in the expression (1), I.sub.out is obtained as approx. 0.91.I.sub.in and the error .epsilon. between input and output is obtained as follows: ##EQU1## Iout is obtained as a value approximately 9% smaller than I.sub.in.
Then, the supply voltage dependency of the current mirror circuit CM10 shown in FIG. 1 is considered below.
When the supply voltage is assumed as V.sub.CC, the Early voltage of the transistors Q11 and Q12 as V.sub.A, the collector voltage to the emitter of the transistor Q11 as V.sub.CE11, and the base voltage to the emitter of the transistor Q13 as V.sub.BE13 ; the output current Iout is obtained as follows: EQU Iout=Iin (V.sub.A +V.sub.CC -V.sub.BE13)/(V.sub.A -V.sub.CE11) (2)
The emitter grounded current amplification factor .beta..sub.p is ignored in the expression (2) in order to simplify the calculation.
When the value of V.sub.A is assumed as 10 [V], V.sub.BE13 as 0.7 [V], and V.sub.CE11 as -0.7 [V] in the expression (2); I.sub.out (V.sub.CC =1) is approx. 0.96.I.sub.in when VCC is 1 [V], for example, and Iout, (V.sub.CC =2) is approx. 1.09.I.sub.in when V.sub.CC is 2 [V], for example.
When V.sub.CC changes from 1 to 2 [V] in the expression (2), the change rate .DELTA. of the above Iout is obtained as follows: ##EQU2## When V.sub.CC changes from 1 to 2 [V], for example, I.sub.out changes by approximately 14%.
For the current mirror circuit having the above configuration, as mentioned above, there is a problem that, if a circuit comprises lateral-type transistors, the error .epsilon. between Iin and Iout and the Iout change rate .DELTA. due to the supply voltage fluctuation increase because the emitter grounded current amplification factor .beta..sub.p and the Early voltage V.sub.A are small. Therefore, no high accuracy cannot be obtained from the circuit shown in FIG. 1 especially when low-voltage operations are executed.